TAC-HEP FPGA Module 2025

America/Chicago
Online

Online

Varun Sharma (University of Wisconsin - Madison)
Description

COURSE DESCRIPTION:

Introduction to FPGA programming. Overview of FPGA, design flow, introduction High-Level synthesis and its applications.

Develop an understanding of the differences between different hardware (CPUs / GPUs / FPGAs). Get familiar with their use cases in HEP and develop the ability to identify the ideal hardware accelerator for different HEP applications. Understand the role and capabilities of FPGAs and High Level Synthesis, and learn to write algorithms for hardware.

REQUISITES:

  • Familiarity navigating through UNIX based OS. Familiarity with CLI. Elementary knowledge of C or C++.
  • Students need to set-up a Wisconsin computing account and have login access to cmstrigger02 machine with AMD Vivado/Vitis HLS tools. Students will be provided instructions for doing so prior to the start of the training.


Zoom coordinates:

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Lectures: Tuesdays and Thursday: 11:00-12:00 CT / 12:00-13:00 ET / 18:00-19:00 CET

INSTRUCTIONAL MODALITY:

Virtual via zoom. There will be a combination of lectures and hands-on training.

INSTRUCTOR CONTACT INFO:

Dr. Varun Sharma:ย varun.sharma@cern.ch

COURSE OVERVIEW:

REQUIRED TEXTBOOK, SOFTWARE AND OTHER COURSE MATERIALS:

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