COURSE DESCRIPTION:
Introduction to FPGA programming. Overview of FPGA, design flow, introduction High-Level synthesis and its applications.
Develop an understanding of the differences between different hardware (CPUs / GPUs / FPGAs). Get familiar with their use cases in HEP and develop the ability to identify the ideal hardware accelerator for different HEP applications. Understand the role and capabilities of FPGAs and High Level Synthesis, and learn to write algorithms for hardware.
REQUISITES:
Zoom coordinates:
Lectures: Tuesdays and Thursday: 11:00-12:00 CT / 12:00-13:00 ET / 18:00-19:00 CET
INSTRUCTIONAL MODALITY:
Virtual via zoom. There will be a combination of lectures and hands-on training.
INSTRUCTOR CONTACT INFO:
Dr. Varun Sharma: varun.sharma@cern.ch
COURSE OVERVIEW:
REQUIRED TEXTBOOK, SOFTWARE AND OTHER COURSE MATERIALS: